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1.2-V, 10-bit, 60–360 MS/s time-interleaved pipelined analog-to-digital converter in 0.18 [micro sign]m CMOS with minimised supply headroom
S.-W. Sin
IET Circuits, Devices & Systems(2010),4(1):1
http://dx.doi.org/10.1049/iet-cds.2008.0229

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