SCHEDULED MAINTENANCE
Building a Fab on a Chip†
Abstract
Semiconductor fabs are large, complex industrial sites with costs for a single facility approaching $10B. In this paper we discuss the possibility of putting the entire functionality of such a fab onto a single silicon chip. We demonstrate a path forward where, for certain applications, especially at the nanometer scale, one can consider using a single chip approach for building devices with significant potential cost savings. In our approach, we build micro versions of the macro machines one typically finds in a fab, and integrating all the components together. We argue that the technology now exists to allow one to build a Fab on a Chip.
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